Monthly Archives: September 2018
This time it turned out with a floating point. In time, apparently, they lured the team of Dirk Meyer, one of the creators of Alpha 21264. Now the floating point computation unit contains three separate blocks: addition (FADD), multiplication (FMUL) and storage (FSTORE) (see Fig. 1).
The addition and multiplication blocks are fully pipelined. The FPU architecture is such that it can take every clock input: one addition instruction and one multiplication instruction. Continue reading
Well, AMD is completely out of control. Rolls new processors out of the cornucopia. Most recently, on February 23, AMD announced two new processors: AMD-K6®-III-400 and AMD-K6®-III-450. By the way, February 23rd is the birthday of EPOS, and to all its merits, it’s also the AMD Technical Support Center. Apparently, AMD focused on this particular date. Continue reading