Until recently, the development of new technologies for manufacturing memory components took place in parallel with the development of chipsets manufactured by Intel. But it so happened that in 1998 an advance was formed in the technology of manufacturing chipsets, and memory manufacturers lagged behind. No one could have imagined that a 100 MHz bus would powerfully clear its way.In the first quarter of 1998, Intel introduced the i440BX chipset with a clock frequency of 100 MHz system bus, as well as a family of motherboards based on this chipset with a 100 MHz memory bus. Not far behind Intel and Taiwanese motherboard manufacturers. By the summer of 1998, almost all leading Taiwanese manufacturers had motherboards based on the i440BX chipset, supporting Slot 1 and operating at a frequency of 100 MHz.
As a rule, before the release of new platforms, Intel presents specifications for new chipsets and memory modules, but this time the company was a little late with the development of a specification for 100 MHz memory.
With the advent of chipsets operating at a frequency of 100 MHz by Taiwanese manufacturers ALI ALADDIN 5 and VIA MVP3, I got a second life and Socket 7. AMD processors operating at a clock frequency of 100 MHz require a wide memory bandwidth and the use of 100 MHz SDRAM. For the first time, support for an interface with system memory SDRAM was implemented in Intel TX and VX chipsets. SDRAM is available in Dual In-Line Memory Modules (DIMMs). Such organization of memory allows to extract 64 bits of data from it at the same time.
For SDRAM, working with TX and VX chipsets, a clock frequency of 66 MHz was provided, and no one thought that in the near future a new chipset would support a bus frequency of 100 MHz. But he appeared, and very soon. Produced SDRAM modules could work stably at frequencies above 66 MHz, and some samples of this memory even now operate at a frequency of 100 MHz. Planning to meet the memory requirements for 66 MHz systems and adhering to Intel’s policy for supporting such systems, many memory manufacturers have produced too many 66 MHz SDRAM modules. Although a year ago there were real 10- and 8-nanosecond SDRAM memory chips, but the production of 100 MHz SDRAM modules was not accelerated, because the specification was delayed, known as the PC100 and only released in February 1998.
Most of the existing SDRAM memory chips are 10-ns and, according to Intel, they do not allow the memory module to work stably at frequencies of 100 MHz or more, although they are called “100 MHz”. The technology for manufacturing a memory operating at a frequency of more than 100 MHz is extremely complex and requires special treatment for all elements of the digital data transmission path. Intel’s PC100 memory module specification contains over 250 pages of text. By this specification, Intel has greatly limited the number of possible memory manufacturers; the requirements for SDRAM manufacturing technology are so high. The memory specification consists of 4 sections.
The first part of the specification gives a detailed description of the components of the PC100 chips, on the basis of which the DIMM modules are built. The second is devoted to a detailed description of the most common PC100 SDRAM Unbuffered DIMM. The third one gives an idea of the structure and characteristics of the special PC100 SDRAM Registered DIMM memory, which has not yet become widespread and is used mainly only in very complex computer systems that require a large amount of RAM. The fourth part describes the Serial Presence Detect (SPD) interface, through which the processor receives information about the structure of the installed memory module.
SDRAM PC100. Types, characteristics, differences
Currently, in the offers of sellers of 100 MHz memory, we can find 2 memory classes that meet the PC100 standard for use in computer systems:
PC100 SDRAM Unbuffered DIMM;
PC100 SDRAM Registered DIMM.
PC100 SDRAM Unbuffered DIMMs, otherwise called “unbuffered”, are used in systems that do not require more than 768 MB of memory and have the configuration shown in Table 1. 1, where column No. 2 is the capacity of the memory module in megabytes, column No. 3 is the organization of the module (megabytes per discharge), No. 4 is the capacity in Mbit of a single chip installed on the DIMM SDRAM module, No. 5 is the organization of the chip (megabytes per discharge) ), No. 6 – the total number of chips installed on the SDRAM module.