Excellent coprocessor (FPU)
This time it turned out with a floating point. In time, apparently, they lured the team of Dirk Meyer, one of the creators of Alpha 21264. Now the floating point computation unit contains three separate blocks: addition (FADD), multiplication (FMUL) and storage (FSTORE) (see Fig. 1).
The addition and multiplication blocks are fully pipelined. The FPU architecture is such that it can take every clock input: one addition instruction and one multiplication instruction. The FSTORE block provides an exchange between registers and memory, while its two main blocks (FADD and FMUL) execute their instructions. Already by these signs, the Athlon processor floating-point node is significantly superior to the same P-III processor node. There are many more differences (all for the better). For those who are interested in all the details of the new processor, I recommend that you look at the original (from AMD) description of the processor structure (file amdk7tb.pdf on our website). He, of course, is in English. But, probably, this should not be a serious obstacle. On the signature stamp “Confidential” do not pay attention. On August 16, AMD lifted bans on the publication of these materials.
The new processor set 3DNOW! replenished with 24 new instructions. But now these extensions concern far not only toys.
12 new instructions for processing fixed-point operands are focused on: voice recognition tasks, data compression, information encoding.
7 new instructions focused on faster streaming data. This, in particular, promises to make surfing on the Internet more enjoyable.
5 new instructions are specially designed for working with communication tools. These are digital signal processors (DCP). These are software and xDSL modems, etc.
So 3DNOW! really came out of childhood! Now it is not only a tool for the delight of gamers (gamers), but also a very serious base for serious applications. For those interested, I recommend watching a presentation from AMD specifically dedicated to this issue.