This time it turned out with a floating point. In time, apparently, they lured the team of Dirk Meyer, one of the creators of Alpha 21264. Now the floating point computation unit contains three separate blocks: addition (FADD), multiplication (FMUL) and storage (FSTORE) (see Fig. 1).
The addition and multiplication blocks are fully pipelined. The FPU architecture is such that it can take every clock input: one addition instruction and one multiplication instruction. Continue reading